1. Field
The following description relates to a method and apparatus for processing operations in parallel using a Single Instruction Multiple Data (SIMD) processor.
2. Description of Related Art
Single Instruction Multiple Data (SIMD) is a class of parallel computing for processing multiple pieces of data using a single instruction. SIMD enables a plurality of operation apparatuses to simultaneously process multiple data by applying the same operation or a similar operation to the multiple data. For example, SIMD may be used in a vector processor.
A decoder such as a Viterbi decoder may be included in a processor. A Viterbi decoder uses a Viterbi algorithm to decode a bitstream that has been encoded using forward error correction. Viterbi decoding typically includes three operations, for example, a Branch Metric Computation (BMC) operation, an Add-Compare-Select (ACS) operation, and a Traceback (TB) operation. In the BMC operation, branch metrics are computed. In the ACS operation, computed metrics are compared, and a branch is selected. In the TB operation, traceback is performed.
However, because a capacity of a memory required for decoding has increased in response to an increase in a depth of Viterbi decoding, the overall hardware logic has increased in size. Additionally, due to a small amount of ACS operation result information, memory may be wasted when the ACS operation result information is stored.
Accordingly, there is a desire for a technology that may effectively use memory during Viterbi decoding, to reduce the size of the overall hardware logic, and to reduce wasted memory space, even if a depth of the Viterbi decoding is increased.